1. Technical Field
This disclosure relates to a wiring board such as a printed wiring board where plural electrodes are formed on a surface of a substrate made of an insulation material for mounting on electronic part such as IC chip or a condenser, an electronic circuit board, an electronic apparatus and a manufacturing method of the electronic circuit board.
2. Description of the Related Art
Conventionally, electronic circuit boards, such as module boards where electronic parts are mounted on wiring boards, have been widely used for various kinds of electronic apparatuses. As the size of the electronic apparatus becomes smaller, it is required to make a mounting area on a wiring board of an IC chip small. Such a requirement of small size is discussed with reference to FIG. 1 through FIG. 3.
Here, FIG. 1 is a schematic structural view of a related art Quad Flat Package (QFP) as an IC chip. FIG. 2 is a schematic structural view of a related art electronic circuit board manufactured by an old type Chip On Board (COB) process wherein a bare chip 2 as an IC ship is connected to a wiring board by wire bonding. FIG. 3 is a schematic structural view of a related art electronic circuit board manufactured by a new type Chip On Board (COB) process wherein the bare chip is mounted as a flip chip.
The Related Art Quad Flat Package (QFP) shown in FIG. 1 includes a bare chip 2, plural lead electrodes 3, a package 4, and others. Plural electrode pads are formed on a surface of the bare chip 2. The package 4 is made of a resin material for sealing the periphery of the bare chip 2.
The lead electrodes 3 project from a side surface of the package 4 in the shape of gull wings. The lead electrodes 3 lead electric input or output of the bare chip 2 provided in the package 4 to a wiring board not shown in FIG. 1.
In the package 4, the electrode pad 1 formed on the surface of the bare chip 2 and end parts of the lead electrodes are connected by a wire 5 made of gold. This connection is made by a well-known wire bonding method. In the QFP having the above-discussed structure, the lead electrodes 3 project in the gull wing shape outside of the package 4 and extend straight toward the bare chip 2 inside of the package 4, so that most of a mounting area on the wiring board not shown in FIG. 1 is occupied by the lead electrodes 3.
In the electronic circuit board shown in FIG. 2, the bare chip 2 is mounted on a wiring board 100, not in a package where the bare chip 2 is sealed by a resin material, but unsealed. More specifically, plural electrode pads 1 on the bare chip 2 mounted on the wiring board 100 are connected to plural electrodes 101 formed on the wiring board 100 by a wire bonding method. Since lead electrodes used in the QFP shown in FIG. 1 are not necessary by such a wire connection, it is possible to make the mounting area small. The package 4 made of the resin material sealing the bare chip 2 mounted on the wiring board 100 may be provided.
In the electronic circuit board shown in FIG. 3, while the bare chip 2 is mounted on the wiring board 100 unsealed by the resin material, the way of mounting the bare chip 2 in FIG. 3 is different from the way of mounting the bare chip 2 in FIG. 2.
More specifically, in the electronic circuit board shown in FIG. 2, the bare chip 2 is mounted on the wiring board 100 so that the electrode pad forming surface, namely a front surface of the bare chip 2, faces vertically upward. On the other hand, in the electronic circuit board shown in FIG. 3, the bare chip 2 is mounted on the wiring board 100 so that the front surface of the bare chip 2 faces vertically downward, namely in a face down flip chip state.
Such mounting of the bare chip 2 is done by a Surface Mount technology (SMT). In the SMT, first, a solder paste lump is printed on the electrode 101 of the wiring board 100 by a mask printing method. Next, a chip such as an IC chip or chip condenser is mounted on the wiring board 100 so that an electrode pad 1 formed on a lower surface of the chip part comes in contact with the printed solder paste lump. By applying a reflow process, solder particles in the solder paste lump are melted then made solid, so that the electrode 101 of the wiring board 100 and the electrode pad of the chip are connected by the solder 6. By such an SMT, in the electronic circuit board in FIG. 3 where the bare chip 2 is mounted as the flip chip, unlike the electronic circuit board shown in FIG. 2, the bare chip 2 is mounted on the wiring board without providing the wire used for the wired bonding. Under this structure, it is possible to make the mounting area smaller because the wire 5 is not provided to the outside of the bare chip 2.
As a result of the reflow process, a gap is formed between the lower surface of the bare chip 2 and the surface of the wiring board 100. Such a gap is filled with an underfill material 7.
A method for manufacturing the electronic circuit board shown in FIG. 3 is discussed in Japanese Laid-Open Patent Application Publications No. 2001-308268 and No. 2003-282630.
It is general practice for the electrode 101 of the wiring board 100 to have a structure where an Au surface layer is provided on the surface of a metal mother material such as copper by an electrolytic gold plating process. The reason why the Au surface layer is provided is as follows.
In other words, while it is general practice for copper, aluminum, or the like to be used as the metal mother material of the electrode 101 of the wiring board 100, these metal materials may be oxidized and therefore the surface of these metal materials may be covered with an oxide film.
Since the metal mother material covered with the oxide film repels the molten solder, it is difficult to implement good solder connections. In order to realize good solder connections, an oxide film removing process may be applied to an exposed metal mother material and then the solder connection may be immediately formed.
However, in this method, a great number of the wiring boards 100 so made cannot be kept. If the wiring board 100 is left in an exposed state, the metal mother material is easily oxidized so that unevenness of an electric property of the electrodes 101 is generated due to the difference in exposure terms and a stable quality cannot be kept.
On the other hand, if the wiring boards 100 so made are not to be kept and the manufacturing process of the wiring board 100 and the mounting process of the electronic part on the wiring board 100 after the manufacturing process are continuously implemented, manufacturing costs rise and are higher than those in a case where the wiring boards 100 so made are to be kept. Because of this, an Au surface layer formed on the surface of the metal mother material is adopted as the structure of the electrode 101. By coating the surface of the metal mother material with Au (gold), which is a metal material that is hardly oxidized, even if a great amount of the wiring boards 100 so made are as to be kept, it is possible to prevent the oxidation of the surface of the electrode 101 and keep a state where solder can be easily provided.
In the manufacturing methods of the electronic circuit board discussed in Japanese Laid-Open Patent Application Publications No. 2001-308268 and No. 2003-282630, the solder 6 connecting the bare chip 2 and the wiring board 100 may be fragile. More specifically, as discussed above, it is general practice for the electrode 101 of the wiring board 100 to have a structure where an Au surface layer is provided on the surface of a metal mother material by the electrolytic gold plating process.
On the other hand, recently and continuing, as the size of the bare chip 2 becomes smaller because of the improvements of chip manufacturing techniques, the size of the electrode pad 1 of the bare chip 2 also becomes smaller. In addition, the diameter of the electrodes formed on the wiring board becomes reduced from greater than 250 μm to less than 250 μm. In the printing process for printing the solder paste lump on the small sized electrode 101, it is necessary to make the thickness of the printing mask extremely thin so that the solder paste is taken out from a minute piercing hole forming the printing pattern of the printing mask. The thickness of the solder paste lump after the printing also becomes less. Thus, in a recent technique whereby the thickness of the solder paste lump is made thin, the amount per unit area of the solder 9 provided between the electrode 101 of the board 100 and the electrode pad 1 of the bare chip 2 is small. When the solder particles of the solder paste lump printed on the electrode 101 are melted by the reflow process, gold in the Au surface layer of the electrode 101 is educed into the molten solder. If the amount of the educed gold is too much, the solder 6 after being solidifying becomes extremely fragile. In recent techniques wherein the amount per unit area of the solder 9 is extremely small, the ratio of the educed amount of gold against the solder 6 is large so that the solder 6 may be extremely fragile.
An inventor of the present invention determined that the educed amount of gold against the solder 6 becomes smaller by reducing the thickness of the Au surface layer of the electrode 101. In an electrolytic plating process, since the thickness of the Au surface layer may be approximately 2 μm, it is not possible to prevent the solder 6 from becoming fragile. On other hand, in electroless plating, since the thickness of the Au surface layer may be approximately several hundreds nm, it is possible to sufficiently prevent the solder 6 from becoming fragile.
The inventor of the present invention tried to manufacture the electrode 101 having the Au surface layer by the electroless plating process. However, the solder 6 could not be connected to the electrode 101 very well. This is because a large number of minute invisible holes are formed in the extremely thin Au surface layer and the metal material under the Au surface layer is exposed through the holes so that an oxide film is formed.
Next, the inventor of the present invention manufactured a wiring board 100 where a surface of the electrode 101 not having the Au surface layer is covered by a film of flux made of a material different from Au so that oxidation prevention film is formed on the electrode 101. After such a wiring board 100 was left for a designated time, the bare chip (flip chip) 2 was mounted on the wiring board 100 by the SMT. As a result of this, the bare chip 2 could be connected to the wiring board 10 very well without repelling the molten solder on the electrode 101. In addition, sufficient strength could be obtained using the solid solder 6. Hence, by covering the surface of the electrode 101 not having the Au surface layer with the film of flux, which flux is a non-metal material, it is possible to so make and keep a large number of the wiring boards 100. Therefore, low cost manufacturing can be achieved and sufficient strength of the solder 6 can be obtained.
However, in such a wiring board 100, some of the plural electrodes 101 formed on the wiring board 100 cannot work well as contact electrodes. More specifically, in recent electronic apparatuses, not all of the plural electrodes 101 on the wiring board 100 work as electrodes for solder connection but some of electrodes 101 work as contact electrodes. Here, the contact electrode works as an electric contact between an electric apparatus main body and an electronic device detachable from the electronic apparatus main body. For example, a home television game machine may have a structure where a ROM cassette in which game software is stored can be detached from a game machine main body. Under this structure, a contact electrode for connecting the game machine main body and the ROM cassette is necessary. Because of this, a home television game machine, having a structure where the contact electrode provided on the electronic circuit board of the ROM cassette is slid on the contact electrode at the game machine main body side as accompanying attachment or detachment of the cassette so that both contact electrodes are connected, has been widely sold.
In addition, for a portable phone having a structure where a battery unit as an electronic device is attached or detached against a phone main body, it is general practice for the phone main body and the battery unit to be connected by similar contact electrodes. Surfaces of these contact electrodes are not covered with solder so as to be exposed.
Because of this, it is preferable that an Au surface layer be provided so that the reduction of the conductivity due to the progress of the oxidation can be prevented. In addition, in a case where the contact electrodes are slid and come in contact with each other as accompanying attachment and detachment of the electronic device, the Au surface layer works effectively. Since gold (Au) is a metal material having a relatively small coefficient of sliding friction, hanging of the contact electrodes at the time of sliding and making contact can be prevented so that a smooth attachment or detachment can be done.
On the other hand, recently, the processing speed of bare chip 2 has become higher due to the improvement of chip manufacturing techniques. For accompanying the high speed, it is desirable that the signal transmission speed between the bare chip 2 and other electronic parts becomes high or that noise mixture is reduced.
However, there is no discussion about a technique whereby the signal transmission speed between electronic parts can be made high and noise mixture can be reduced, in Japanese Laid-Open Patent Application Publications No. 2001-308268 or No. 2003-282630.
In the manufacturing method of the electronic circuit board discussed in Japanese Laid-Open Patent Application Publications No. 2001-308268 and No. 2003-282630, depending on the structure of the bare chip 2, the underfill process may be difficult. This is because, as shown in FIG. 4, plural electrode pads 1 are concentrated on a circumference edge part of the electrode forming surface of the bare chip 2 so that the electrode 1 is not provided in the center of the electrode forming surface.
In the underfill process of the bare chip 2, as shown by an arrow in FIG. 5, an underfill material is caused to flow from an opening formed in the plural solders 6 connecting the bare chip 2 and the wiring board 100 so that the underfill material is made to go right below the chip center part by capillary action. However, if this opening is too small, sufficient capillary action cannot be obtained and therefore the underfill process may be difficult.